1. Field of the Invention
The present invention relates to an active matrix panel using thin film transistors (TFTs).
2. Description of the Related Art
FIG. 12 shows a conventional active matrix panel. In an active matrix panel 12001, as disclosed in Japanese Patent unexamined published No. 1-289917, a source line driver circuit 12002, a gate line driver circuit 12003, and a pixel matrix 12004 are formed on the same (single) substrate.
The source line driver circuit 12002 has a shift register 12005 and a sample holding circuit 12006 formed by TFTs and is connected to the pixel matrix 12004 through a source line 12007.
The gate line driver circuit 12003 has a shift register 12008 and a buffer circuit 12009 and is connected with the pixel matrix 12004 through a gate line 12010.
In the pixel matrix 12004, a pixel 12012 is formed at a intersection of the source line 12007 and the gate line 12010 and has a TFT 12013 and a liquid crystal cell 12014.
FIG. 13 shows a system for processing image data stored in a memory device such as a random access memory (RAM) using a software by a microcomputer. This system has a liquid crystal display device 13001, a digital signal/analog signal converting circuit (D/A converting circuit) 13002, an image data memory device 13003, an image processing system 13004 including a microcomputer (not shown), a data bus 13005, and an address bus 13006. Numeral 13007 represents a memory device control signal, numeral 13008 represents a control signal for the liquid crystal display device 13001 and the D/A converting circuit 13002.
The operation is described below. The contents of image processing are programmed by C language or the like and then compiled in the system 13004. In accordance with the contents of the image processing, the image data stored in the memory device 13003 is read out on the data bus 13005, and then data processing is performed by the system 13004. The processed image data is stored in the memory device 13003 or displayed on the liquid crystal display device 13001 through the DA converting circuit 13002. Thus, the liquid crystal display device 13001 has only function for displaying the image data.
In a conventional active matrix panel, there are the following problems.
(1) Miniaturization of a Display Device and a System is Hindered.
Conventionally, as shown in FIG. 12, since an active matrix panel has only a circuit for driving each pixel in a pixel matrix, access to a circuit for displaying the pixel circuit, in particular, an image processing system, is performed from an external of the active matrix panel. Recently, because of increase of image data and complication of data processing, processing in an external is increased, so that the amount of the data processing exceeds processing capacity of a microprocessing unit (MPU). Accordingly, in order to decrease the amount of data processing of the MPU, an exclusive external processing unit is incorporated in a semiconductor integrated circuit. However, this increases the number of parts for an image display apparatus having image processing operation and hinders miniaturization of a system.
(2) A Region which is not Used is Present in a Panel.
Since a conventional active matrix panel includes driver circuits for pixels, gate lines and source lines, a region which is not used is present in a panel. If an external part can be arranged in the region, further miniaturization of a display system can be performed by effectively using a physical space.
(3) A High Speed Operation of a System for Performing Image Processing is Prevented.
In order to control pixels, it is necessary to operate an MPU in a system other than a panel. However, since an image processing technique is complexed year by year and therefore a software is complexed and increased, a data processing time of an MPU is increased and an access time to a memory device is also increased. This is because an MPU ensures a data bus to access the memory device. To solve this, it is effective to perform parallel processing by using a special purpose hardware. However, the number of parts increases. Therefore, the number of parts is decreased. By this, a system cannot be operated at a high speed, so that a process time of a MPU is further increased.